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Renesas Electronics /R7FA4M1AB /PORT0 /PCNTR2

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Interpret as PCNTR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PIDR0Reserved

PIDR=0

Description

Port Control Register 2

Fields

PIDR

Pmn Input Data

0 (0): Low input

1 (1): High input.
Reserved

These bits are read as 0000000000000000.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data